The BRADLEY DEPARTMENT of ELECTRICAL and COMPUTER ENGINEERING

Patrick R. Schaumont | ECE | Virginia Tech

ECE PROFILE

Patrick R. Schaumont

Picture of Patrick R. Schaumont

Office:
Durham 337

Mailing Address:
1185 Perry Street
453 Whittemore (0111)
Virginia Tech
Blacksburg, VA 24061

(540) 231-3553
(540) 231-3362
schaum@vt.edu


Education:

Ph.D., Electrical Engineering, University of California at Los Angeles, 2004
Licenciaat degree in de Informatica, University of Ghent, Belgium, 1990
Industrieel Ingenieur Electronica, Industriele Hogeschool van het Rijk, Ghent, Belgium, 1988

Teaching Interests:

Research Interests:

My research covers design and implementation aspects of security in embedded systems design. This includes secure protocols and cryptography implemented in embedded hardware and software and countermeasures against implementation attacks. I am interested in all abstraction levels of design, including circuits, hardware micro-architecture, firmware, and platform-specific software. I am also working on methodologies, with a focus on the trade-off between system performance, system cost, and system security.

Blog:
Selected Publications:
  • B. Yuce, P. Schaumont, M. Witteman "Fault Attacks on Secure Embedded Software: Threats, Design, Evaluation" Springer Journal of Hardware and Systems Security, May 2018.doi

  • E. De Mulder, T. Eisenbarth, P. Schaumont, "Identifying and Eliminating Side-channel Leaks in Programmable Systems" IEEE Design and Test, 35(1):74-89, February 2018.doi

  • Y. Yao, M. Yang, B. Yuce, C. Patrick, P. Schaumont, "Fault-Assisted Side-Channel Analysis of Masked Implementations," IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2018. doi

  • M. Taha, A. Reyhani-Masoleh, P. Schaumont, "Stateless Leakage Resiliency from NLFSRs," IEEE Symposium on Hardware Oriented Security and Trust (HOST 2017), McLean, VA, May 2-17. Best paper nominee. doi

  • H. Rawat, P. Schaumont, "Vector Instruction Set Extensions for Efficient Computation of KECCAK," IEEE Transactions on Computers, 66(10):1778-1789, Oct. 1 2017.doi.

  • C. Suslowicz, A. Krishnan, P. Schaumont, "Optimizing Cryptography in Energy Harvesting Applications," 2017 Workshop on Attacks and Solutions in Hardware Security (ASHES), Dallas, TX, November 2017. doi.

  • B. Yuce, N. Farhady Ghalaty, H. Santapuri, C. Deshpande, C. Patrick, P. Schaumont, "Software Fault Resistance is Futile: Effective Single-glitch Attacks," Fault Diagnosis and Tolerance in Cryptography (FDTC 2016), Santa Barbara, CA, August 2016. doi

  • N. F. Ghalaty, B. Yuce, M. Taha, P. Schaumont, "Differential Fault Intensity Analysis," 11th Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2014), Busan, Korea, September 2014. doi

  • A. Aysu, E. Gulcan, P. Schaumont, "SIMON Says, Break Area Records of Block Ciphers on FPGAs," IEEE Embedded Systems Letters, 6(2):37-40, April 2014. doi

  • A. Maiti, P. Schaumont, "The Impact of Aging on a Physical Unclonable Function," IEEE Transactions on Very Large Scale Integration (VLSI) Systems,22(9):1854-1864, August 2014. doi