Manufacturing practices used in silicon integrated circuit fabrication and the underlying scientific basis for these process technologies. Physical models are developed to explain basic fabrication steps, such as substrate growth, thermal oxidation, dopant diffusion, ion implantation, thin film deposition, etching, and lithography. The overall CMOS integrated circuit process flow is described within the context of these physical models.
The key to realizing the theoretical limits of electronic device and circuit performance is the ability to integrate many dissimilar materials over extremely small length scales into complex three-dimensional patterns. The aim of this course is to better prepare students for advanced work in microelectronics by teaching them the basic physical underpinnings of this integration in semiconductor processing.
Percentage of Course
|Crystal Growth and Wafer Fabrication||10|
|Clean Rooms - Contamination Control||10|
|Thin Film Depostion||10|
|Back End Technology||10|
|CMOS Process Flow||10|