Advanced digital design techniques for developing complex digital circuits. Emphasis on system-level concepts and high-level design representations while meeting design constraints such as performance, power, and area. Methods presented that are appropriate for use with automated synthesis systems. Commercial hardware description language simulation and synthesis tools used for designing a series of increasingly complex digital systems, and implementing those systems using Field Programmable Gate Arrays (FPGAs).
Digital systems are part of our everyday lives, with a diverse range of application areas, such as toys, consumer electronics, automobiles, networking, and energy management. These complex digital systems have stringent design constraints, such as execution time, area, power consumption, cost, and reliability. State-of-the-are digital design techniques are required to meet these constraints while providing the desired functionality. The ability to design, implement, and analyze complex digital systems is in demand in industry as well as academia.
Design Technical Elective for CPE;
C- or better in 3544
ECE 3544 is the required prerequisite. ECE 3544 contains material that is directly related to this course. Specifically, familiarity with Boolean Algebra, registers, counters, Read Only Memory (ROMs), Programmable Logic Array (PLAs), multiplexers, logic optimization, state tables, state assignments, Moore and Mealy circuits, Hardware Defined Language (HDL) simulation and synthesis of combinational and sequential circuits will be assumed.
Percentage of Course
|1. Synthesis performance optimization||12%|
|2. Datapath design: sharing, scheduling, retiming||12%|
|3. Timing modeling and analysis||4%|
|4. Low power design techniques||8%|
|5. Asynchronous circuit and protocol design||8%|
|6. Clock generation, synchronization, and multi-clock domains||8%|
|7. Advanced arithmetic circuits||8%|
|9. Systems-on-chip and networks-on-chip||12%|
|10. Serializers / deserilaizers, encoders and termination||8%|
|11. FPGAs, standard cells, and memories||8%|
|12. Testing and debugging||12%|