Virginia Tech® home

ECE 5514 - Design of Systems on a Chip (3C)

Course Description

Current state of the art in the system-level design of Systems on a Chip. The focus is in the hardware, scheduling, and applications at the highest levels of design.

Why take this course?

The combination of single-chip transistor desnity, size, and power constraints, and the end of an era of steady growth of performance for single core processors has led to the era of Systems on a Chip in which multiple cores cooperate to carry out some computing goal. Currently, the questions outpace the solutions in this area of research, even though there is a body of research that has begun on Systems on a Chip and multi-core computing in the past decade. This course is structured to ehlp students understand the state of the art of Systems on a Chip design and, in so doing, prepare them to critically evaluate future research as it develops over the next decades.

Learning Objectives

  • Research major Systems on a Chip topics such as applications, architecture, design, and evaluation
  • Develop models for future applications, architecture, design, and evaluation
  • Describe the inter-related effects of applications, architecture, design, and evaluation
  • Identify, analyze, and predict computing trends